Title:
FSK DEMODULATION CIRCUIT
Document Type and Number:
Japanese Patent JP3482031
Kind Code:
B2
Abstract:
PURPOSE: To receive data signals at much higher speed without depending on the accuracy of a BPF by passing two kinds of data signals, which are passed through the BPF, through a phase filter circuit and a differentiation circuit and turning on/off an analog switch corresponding to the differentiated signals.
CONSTITUTION: A BPF 1 passes two kinds of data signals fL and fH at low and high frequencies. A phase filter circuit 2 is connected to the output side of the BPF 1 and respectively delays the phases of two kinds of data signals at 90° before and behind the intermediate frequency of two kinds of data signals. An analog switch 4 is turned on/off corresponding to a signal fD differentiated by a differentiation circuit 3 connected to the output side of the phase filter circuit 2. Only when the analog switch 4 is turned on, a capacitor C2 is charged/ discharged by a fixed time constant. A comparator circuit 5 compares voltages at both the terminals of the capacitor C2 with a threshold voltage V1 decided in advance and outputs '1' or '0' logic data FR.
Inventors:
Ken Sakakura
Kazumi Kitagawa
Kazumi Kitagawa
Application Number:
JP7274595A
Publication Date:
December 22, 2003
Filing Date:
March 30, 1995
Export Citation:
Assignee:
Aiphone Co., Ltd.
International Classes:
H04L27/14; (IPC1-7): H04L27/14
Domestic Patent References:
| JP5735402A |
Attorney, Agent or Firm:
Moriya Kazuo (1 person outside)
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