Title:
ゲート構造とその製造方法
Document Type and Number:
Japanese Patent JP7050063
Kind Code:
B2
Abstract:
This invention concerns a gate structure and a process for its manufacturing. In particular, the present invention concerns the gate structuring of a field effect transistor with reduced thermo-mechanical stress and increased reliability (lower electromigration or diffusion of the gate metal). The gate structure according to the invention comprises a substrate; an active layer disposed on the substrate; an intermediate layer disposed on the active layer, the intermediate layer-having a recess extending through the entire intermediate layer towards the active layer; and a contact element which is arranged within the recess, the contact element completely filling the recess and extending to above the intermediate layer, the contact element resting at least in sections directly on the intermediate layer; the contact element being made of a Schottky metal and the contact element having an interior cavity completely enclosed by the Schottky metal.
Inventors:
Osipov, Constantine
Rossy, Richard
Wurful, Hans-Joachim
Rossy, Richard
Wurful, Hans-Joachim
Application Number:
JP2019527189A
Publication Date:
April 07, 2022
Filing Date:
November 20, 2017
Export Citation:
Assignee:
Forschungsverbund Berlin e.V.
International Classes:
H01L21/338; H01L21/285; H01L21/336; H01L29/12; H01L29/41; H01L29/423; H01L29/49; H01L29/778; H01L29/78; H01L29/812
Domestic Patent References:
JP10335351A | ||||
JP2014183125A | ||||
JP2011238805A | ||||
JP4132232A |
Foreign References:
US20150132932 |
Attorney, Agent or Firm:
sk patent corporation
Akihiko Okuno
Hiroyuki Ito
Akihiko Okuno
Hiroyuki Ito