Title:
HETERO JUNCTION FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREOF
Document Type and Number:
Japanese Patent JP2012043964
Kind Code:
A
Abstract:
To provide a hetero junction field effect transistor that suppresses current collapse and reduces gate leakage current, and provide a manufacturing method of the hetero junction field effect transistor.
The hetero junction field effect transistor includes: a nitride semiconductor layer including a barrier layer 40 and a cap layer 50 formed on the barrier layer 40; a gate electrode 90 provided on the nitride semiconductor layer so that a lower part of the gate electrode 90 is embedded in the nitride semiconductor layer; and a surface protection film 100 formed on the nitride semiconductor layer and made of an insulation film that does not contain Si.
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Inventors:
SUZUKI YOSUKE
NANJO TAKUMA
IMAI AKIFUMI
FUKITA MUNEYOSHI
SHIOZAWA KATSUOMI
ABE YUJI
NANJO TAKUMA
IMAI AKIFUMI
FUKITA MUNEYOSHI
SHIOZAWA KATSUOMI
ABE YUJI
Application Number:
JP2010183595A
Publication Date:
March 01, 2012
Filing Date:
August 19, 2010
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L21/338; H01L21/28; H01L29/778; H01L29/812
Attorney, Agent or Firm:
Yoshitake Hidetoshi
Takahiro Arita
Takahiro Arita