To prevent data in an internal memory from being destroyed when a high speed processor becomes out of control by pulling out a memory cartridge.
The high speed processor 12 processes a game program stored in the memory cartridge. A power supply control routine is carried out at this time, and capacitors C4 and C5 included in a charge pump circuit 24c repeat charging and discharging. When abnormality takes place in the processor 12 and the power supply control routine is not appropriately conducted any more, potential difference Vc increases between one end of a resistor R10 and a reference potential surface. When the potential difference Vc surpasses a threshold, a power supply on/off control circuit 24b stops the feeding of a stabilization voltage to turn off the entire system including the processor 12.
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JPH09297579A | 1997-11-18 | |||
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