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Title:
INPUT SIGNAL CORRECTION CIRCUIT OF A/D CONVERTER
Document Type and Number:
Japanese Patent JPH07226684
Kind Code:
A
Abstract:

PURPOSE: To feedback the fluctuation amount in an input range to an input analog signal and to match the amplitude of the analog signal with the analog input range of an A/D converter by properly determining the amplitude correction amount and the offset correction amount of the input analog signal.

CONSTITUTION: As for an analog video signal S1, a pedestal level is clamped to 0V in a pedestal clamp circuit 2 and the signal is outputted as an analog video signal S2. An amplitude correction is performed for the signal S2 by the amplitude correction signal Sa from an amplitude correction signal generation circuit 5 in an amplitude correction circuit 3 and the signal S2 is outputted as an analog video signal S3. An offset correction is performed for the signal S3 by the offset correction signal Sb from an offset correction signal generation circuit 6 in an offset correction circuit 4 and the signal S3 is outputted as an analog video signal S4.


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Inventors:
SUGANO KIYOYUKI
KONISHI AKIYO
Application Number:
JP1811394A
Publication Date:
August 22, 1995
Filing Date:
February 15, 1994
Export Citation:
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Assignee:
SHARP KK
International Classes:
H04N5/14; H03M1/06; H03M1/10; H03M1/18; (IPC1-7): H03M1/18; H03M1/06; H03M1/10; H04N5/14
Attorney, Agent or Firm:
Hiromitsu Fujimoto



 
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