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Title:
JOSEPHSON LOGICAL INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS61281718
Kind Code:
A
Abstract:

PURPOSE: To separate completely the input and output by using a magnetic flux coupling circuit for an OR gate, using a direct coupling circuit for an AND gate and inputting/outputting a signal to/from the AND gate always via an OR gate.

CONSTITUTION: A logic cell 10 consists of magnetic flux coupling circuits 20∼23 used as the OR gate, the direct coupling circuits 30, 31 used as the AND gate, a power bus 40, power supply resistors 50∼53, termination resistors 60∼67 one terminal of which is connected to ground, output resistors 70, 73 of the magnetic flux coupling circuits, input resistors 80∼83 of the direct coupling circuits and output resistor 20 are connected to terminals 170∼171 of the resistors 80∼83 or the output terminals of the cell 10 so as to connect logic circuits such as OR and AND gates. Thus, the disadvantage of the direct coupling circuit is improved by inputting the input of the AND gate once to the OR gate in this way.


Inventors:
YAMASHITA KUNIO
HATANO YUJI
NAKANE HIDEAKI
HARADA YUTAKA
Application Number:
JP1985000122561
Publication Date:
December 12, 1986
Filing Date:
June 07, 1985
Export Citation:
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Assignee:
AGENCY IND SCIENCE TECHN
International Classes:
H03K19/195; H01L39/22; (IPC1-7): H01L39/22; H03K19/195
Domestic Patent References:
JPS59147471A1984-08-23