PURPOSE: To shorten the reading processing time of a key operation and to improve the economics by providing an AND circuit of negative logic, and applying the interruption of key reading on a control means only when a key is operated.

CONSTITUTION: A control signal SC which fixes all of the column lines R1-R3 is supplied from a CPU 20 to an interface 16 during the term of a standby mode. When either keys A-I of matrix keys 12 is depressed, a key operating signal outputted from the corresponding row line of row lines C1-C3 goes down to a low level. Next, the key operating signal is supplied to the CPU 20 via an interface 18, and also, is supplied to the CPU 20 as an interrupt signal via the AND circuit 22 of negative logic, then, the reading of a key operating state is started from that time. In other words, since a key reading processing is not performed until the interruption is applied from a key 12 side and another processing can be executed at a time other than that time, the reading processing time of the key operation can be shortened, and also, the economics can be improved.