Title:
LINEAR COMPENSATOR
Document Type and Number:
Japanese Patent JPH11239022
Kind Code:
A
Abstract:
To eliminate an electrolytic capacitor that is needed between these stages when a filter circuit is cascaded to a subsequent stage of a demodulator circuit.
The non-linearity (DC offset included) of a demodulation output of a demodulator circuit 12 is absorbed by using a linear compensation circuit having the degree of freedom in a linear characteristic on the preceding stage of a filter circuit 17. Also, a compensating means absorbs the non-linearity of an FM demodulator circuit by setting an input dynamic range. Also, the compensating means adds a DC offsetting means to its inputting part and absorbs the non-linearity of the FM demodulator circuit.
Inventors:
FURUYAMA KENJI
SHIRATO HIROAKI
SHIRATO HIROAKI
Application Number:
JP4261598A
Publication Date:
August 31, 1999
Filing Date:
February 24, 1998
Export Citation:
Assignee:
TOSHIBA CORP
TOSHIBA AVE KK
TOSHIBA AVE KK
International Classes:
H04N5/455; H03D3/00; H03D3/02; H03F3/45; (IPC1-7): H03D3/00; H03D3/02; H03F3/45; H04N5/455
Attorney, Agent or Firm:
Suyama Saichi
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