Title:
半導体製造装置用ライナー
Document Type and Number:
Japanese Patent JP4301403
Kind Code:
B2
Abstract:
A member provided around a susceptor for mounting a semiconductor in a chamber of a semiconductor production system. The member has a face opposing the susceptor and a center line average surface roughness of the face opposing the susceptor is 0.5 mum or less. Alternatively, the face opposing the susceptor has a thermal emissivity epsilon of 0.5 or lower. The member can also be a liner [ 4 ] having a supported face [ 4 ] whose area is not more than 20 percent of that of the face [ 4 ] opposing the susceptor.
Inventors:
Yoshinobu Goto
Hideyoshi Tsuruta
Hideyoshi Tsuruta
Application Number:
JP2003432140A
Publication Date:
July 22, 2009
Filing Date:
December 26, 2003
Export Citation:
Assignee:
Nippon Insulator Co., Ltd.
International Classes:
F27B5/14; H01L21/205; F27B17/00; H01L21/683; F27D11/00; F27D11/02; H01L21/00; H01L21/68
Domestic Patent References:
| JP4030514A | ||||
| JP1120813A | ||||
| JP8311666A | ||||
| JP5190464A | ||||
| JP2001077096A | ||||
| JP2001517736A |
Attorney, Agent or Firm:
Masumi Hosoda
Juno Aoki
Juno Aoki