PURPOSE: To prevent the change in the trailing time due to the period of an input signal by providing the 2nd load connected to the collector of an output transistor (TR) and the 2nd fixed potential source and providing a diode whose cathode is connected to the base of the output TR and whose anode is connected to the collector.

CONSTITUTION: The 2nd load 17 is connected between the collector of the output TR 15 and the power terminal 13 and a junction diode 18 is connected between the collector and base of the output TR 15. A high voltage level of the output signal reaches a constant voltage level being the level shift from a low voltage level of an input signal by a collector-emitter saturated voltage of a multi- emitter TR 11 and anode-cathode forward voltage of the diode 18, resulting that the high voltage level is decreased to 1/4. Thus, the electric charge in a capacitor generated from the output terminal 16 is reduced and the charge/ discharge time of the capacitor is reduced. Thus, the time required for the output signal being stable at the high voltage level from the low level is quickened and the change in the trailing time by the period of the input signal is prevented.