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Title:
LOW NOISE AMPLIFIER
Document Type and Number:
Japanese Patent JP2009224966
Kind Code:
A
Abstract:

To provide a low noise amplifier which eliminates bias circuit and easily achieve matching gain control.

The low noise amplifier includes: an NMOS transistor and a PMOS transistor where a gate electrode as an input terminal and a drain electrode as an output terminal are common and source electrodes are shortcircuited in AC manner respectively; and a control circuit to adjust a DC potential of the output terminal. The input terminal and the output terminal are connected with each other through a resistance. The resistance may be changed to a variable resistance.


Inventors:
WATANABE KENICHI
NISHIMORI EIJI
Application Number:
JP2008065666A
Publication Date:
October 01, 2009
Filing Date:
March 14, 2008
Export Citation:
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Assignee:
NEW JAPAN RADIO CO LTD
International Classes:
H03F1/26; H03F3/189
Domestic Patent References:
JPS5287345A1977-07-21
JPS63111718A1988-05-17