Title:
MANUFACTURE OF CMOS-FET STRUCTURE
Document Type and Number:
Japanese Patent JPS62268155
Kind Code:
A
Abstract:
A method for forming a CMOS FET structure includes the steps of forming an apertured insulating layer on a silicon substrate and epitaxially forming a monocrystalline silicon island of first conductivity type through an aperture therein. The exposed surface of the silicon island is then thermally oxidized and the portion of the insulating layer not covered by the oxide is removed. A monocrystalline silicon island of second conductivity type is then formed adjacent to the oxidized silicon island of first conductivity type.
Inventors:
RUBOMIRU REON JIYASUTORUZEBUSU
Application Number:
JP10752886A
Publication Date:
November 20, 1987
Filing Date:
May 09, 1986
Export Citation:
Assignee:
RCA CORP
International Classes:
H01L21/20; H01L21/76; H01L21/762; H01L21/8238; H01L27/092; (IPC1-7): H01L21/20; H01L21/76; H01L27/08
Attorney, Agent or Firm:
Tokunji Ikunuma