PURPOSE: To make thin only a channel portion and its vicinities and also to provide an LDD structure by forming a gate electrode on a polycrystalline silicon layer having a thicker layer at a source-drain portion than a channel portion and its vicinities on a substrate and by filling the polycrystalline silicon layer with the impurities at an accelerated voltage.

CONSTITUTION: An island of a polycrystalline silicon film 2 and a gate oxide film 3 as a gate insulation layer are formed in such a manner that the layer thickness of a source portion 9 and a drain portion 10 becomes larger than that of a channel portion 11 and its vicinities on a quartz substrate 1. After performing the doping of phosphorus of a high concentration, a gate electrode 4 is formed. Next, by using an ion implantation apparatus with the gate electrode 4 as a mask, arsenic of a low concentration is first injected at a predetermined accelerated voltage and in succession arsenic of a high concentration is fully injected at a accelerated voltage higher than that of the preceding process. As a result, the arsenic has a low concentration at the portion 12 between the channel portion and the source portion and at the portion 13 between the channel portion and drain portion, thereby providing an LDD region 8 having a gentle concentration gradient.