Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3176973
Kind Code:
B2
Abstract:
PURPOSE: To prevent plating metal from penetrating into the parts covered with a plating resist mask when a bump is formed and, further, reduce a time for plating and form the bump efficiently by a method wherein a plating penetration blocking film is formed in a contact hole by electroplating.
CONSTITUTION: A contact hole 14 is so formed as to reach a metal wiring film 12 which is formed as the lower layer of an insulating protective film 13 on a semiconductor substrate 11 from the upper surface of the insulating protective film 13. A bump electrode is formed in the contact hole 14 by an electroplating method so as to be connected to the metal wiring film 12. For that purpose, a plating resist mask 16 is formed on the insulating protective film 13 including the contact hole 14 by photolithography. Then a plating penetration blocking film 17 which prevents plating metal from penetrating into boundary between the plating resist mask 16 and the lower layer of the mask is formed in the contact hole 14 by an electroplating method. After that, the bump electrode is formed on the plating penetration blocking film 17 by an electroplating method.
Inventors:
Toshiaki Itaka
Hirokazu Ezawa
Hirokazu Ezawa
Application Number:
JP4218792A
Publication Date:
June 18, 2001
Filing Date:
January 31, 1992
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
C25D3/48; H01L21/321; H01L21/60; (IPC1-7): H01L21/60; C25D3/48
Domestic Patent References:
| JP2280335A | ||||
| JP63276247A | ||||
| JP59136950A | ||||
| JP57139945A |
Attorney, Agent or Firm:
Eiji Morota
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