Title:
積層セラミック電子部品の製造方法
Document Type and Number:
Japanese Patent JP7261557
Kind Code:
B2
Abstract:
To provide a method for manufacturing a multilayer ceramic capacitor capable of increasing productivity.SOLUTION: A method for manufacturing a multilayer ceramic electronic component according to the present invention includes a step of producing a plurality of ceramic laminated chips each having a plurality of internal electrodes that are laminated in a first direction and that are exposed from a side surface facing a second direction orthogonal to the first direction. A side margin portion is formed on the side surfaces of the plurality of ceramic laminated chips arranged at a larger interval in the first direction and a third direction orthogonal to the first direction and the second direction than the height dimension in the first direction of the ceramic laminated chip by punching out a ceramic sheet arranged on an elastic member.SELECTED DRAWING: Figure 9
Inventors:
Yosuke Sato
Hidenori Wakayanagi
Joji Kobayashi
Kogure Toshimitsu
Hidenori Wakayanagi
Joji Kobayashi
Kogure Toshimitsu
Application Number:
JP2018195195A
Publication Date:
April 20, 2023
Filing Date:
October 16, 2018
Export Citation:
Assignee:
TAIYO YUDEN CO.,LTD.
International Classes:
H01G4/30
Domestic Patent References:
| JP2015070218A |
Attorney, Agent or Firm:
Shuhei Katayama