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Title:
半導体装置の作製方法
Document Type and Number:
Japanese Patent JP4663139
Kind Code:
B2
Abstract:
A gate insulating film of a TFT is formed without increasing a substrate temperature so that a substrate having a low heat resistance such as a plastic substrate can be used. Further, a structure in which an S value of the above TFT is improved and an off leak current is reduced is used to realize the improvement of reliability of a semiconductor device. In the case where the gate insulating film is formed, it is formed by sputtering so that a region having 0.4 atomic % to 1.6 atomic % is present at concentration measurement of hydrogen in the film by an HFS analysis (hydrogen forward scattering analysis). Then, an insulating film is formed thereon by sputtering so that a region having 0.2 atomic % or less is present at concentration measurement of hydrogen in the film by an HFS analysis. When a TFT is manufactured using such a structure of the gate insulating film, there are obtained TFT characteristics such that a subthreshold coefficient is low and a leak current flowing between a gate electrode and a source electrode or a leak current flowing between a gate electrode and a drain electrode is suppressed.

Inventors:
Atsushi Isobe
Toru Takayama
Tatsuya Arao
Akihiko Takara
Application Number:
JP2001041028A
Publication Date:
March 30, 2011
Filing Date:
February 16, 2001
Export Citation:
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Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G02F1/1333; H01L29/786; G02F1/1368; G09F9/00; H01L21/203; H01L21/316; H01L21/336; H01L21/77; H01L21/84; H01L27/08; H01L27/12; H01L29/49
Domestic Patent References:
JP7335900A
JP8274345A
JP3241874A