Title:
MASK FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURED THE SAME
Document Type and Number:
Japanese Patent JP2006261422
Kind Code:
A
Abstract:
To provide a method for manufacturing a semiconductor device wherein the problems are prevented such as a short circuit, an adhesion failure, and focus deviation etc., due to over-etching of wiring because the areas of overlapping regions for connection are randomly different, in a method for forming fine wiring which is a test pattern and wide leads connected to it on a semiconductor substrate by double exposure using two masks.
The minimum one-directional width of a common data region 107 is made same as the minimum wiring width dimension of the wiring in a TEG region 101, in a connection wherein both data of a first mask and a second mask exist.
Inventors:
MATSUBARA YOSHIHISA
Application Number:
JP2005077356A
Publication Date:
September 28, 2006
Filing Date:
March 17, 2005
Export Citation:
Assignee:
NEC ELECTRONICS CORP
International Classes:
H01L21/3205; G03F1/00; G03F1/68; G03F7/20; H01L21/027; H01L21/768; H01L23/52; H01L23/522
Domestic Patent References:
JPH03196040A | 1991-08-27 |
Attorney, Agent or Firm:
Akio Miyazaki
Ishibashi Masayuki
Masaaki Ogata
Ishibashi Masayuki
Masaaki Ogata
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