To simplify the constitution, to miniaturize a circuit scale and to reduce power consumption by multiplying parallel data outputted from a tap part by a diffusion code, outputting the multiplication data, mutually adding the all multiplication data, forming a tree-like addition part, deleting the low- order bit of the addition data of which the adders of respective stages output and inputting only a high-order bit to the adder of a next stage.

After the transmitting sound signal of a speaker which is outputted from a microphone 10a, is converted into a digital signal by an analog/digital converter A-D: 11a, is encoded by a sound encoder/decoder 12. In a micro processor 13, a control signal or the like is added to an encoding transmitting signal outputted from the sound encoder/decoder 12 and thereby, transmission data are generated. After an error detection code/an error correction code are added to the transmission data by a data generation circuit 14, the data are encoded by a convolution encoder 15, and further, are performed to processing for interleaving by an interleaving circuit 16.