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Title:
MEMORY IC COMPONENT
Document Type and Number:
Japanese Patent JPH05102389
Kind Code:
A
Abstract:

PURPOSE: To suppress generation of electric noise without reducing the degree of freedoms of roundabout of a wiring pattern and the capacity of wirings by incorporating a chip capacitor or an electronic component having a function corresponding to the capacitor.

CONSTITUTION: A reflow pattern 7 for mounting a chip capacitor is provided on an upper surface of an electronic component 1, one side is connected to a power source pin 3, and the other side is connected to a ground pin 4. Further, a chip capacitor 5 is placed on the pattern 7. The upper surface of the component 1 is entirely coated with a protective film 6 made of insulating resin, etc. The capacitor 5 is connected to a power source layer and a ground layer assembled in a printed circuit board through the pins 3 and 4 of the component 1. Thus, noise generated from an oscillator of the board can be removed by the capacitor 5.


Inventors:
SAKAI RYUICHI
Application Number:
JP26183491A
Publication Date:
April 23, 1993
Filing Date:
October 09, 1991
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L25/00; H05K1/18; (IPC1-7): H01L25/00
Attorney, Agent or Firm:
Ogawa Katsuo



 
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