To provide an apparatus and method for optimizing a processing speed of a microprocessor chip.
An optimum processing frequency is set for processors based upon the individual operational characteristics of each processor. The source voltage supplied to the processor is increased, manually or under software control, to the maximum value specified for the processor. This allows the processor to operate at the maximum possible frequency. The processor clock frequency is varied with respect to the motherboard clock frequency so that the processor clock can be arbitrarily set to its maximum operational frequency. A method of approximation is used to determine the maximum clock frequency at which the processor will function properly. In order to prevent thermally induced semiconductor breakdown, additional heat sinking is performed and/or a thermal management scheme is used. The supply voltage may also be controlled in conjunction with the clock rate to determine the optimum operating frequency and supply voltage to the processor.
| JP2917852 | [Title of Invention] Inspection circuit |
| JPS63310211 | CLOCK FAULT DETECTING CIRCUIT |
| JP2002135237 | SEMICONDUCTOR DEVICE |
| JPH05265587A | 1993-10-15 | |||
| JPH05158572A | 1993-06-25 | |||
| JPS61105629A | 1986-05-23 | |||
| JPH07287699A | 1995-10-31 | |||
| JPH03164838A | 1991-07-16 |
| US5490059A | 1996-02-06 |
月刊アスキーDOS/V ISSUE, vol. 第２巻 第４号, JPN6007011334, 29 February 1996 (1996-02-29), JP, pages 212 - 213, ISSN: 0000936189
Hajime Asamura
Hayashi Zouzo
Kuniaki Shimizu