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Patent Searching and Data


Title:
METHOD AND CIRCUIT FOR SIGNAL GENERATION AND SIMULATION CIRCUIT FOR COMPUTER USING THE SAME
Document Type and Number:
Japanese Patent JPH08137978
Kind Code:
A
Abstract:

PURPOSE: To supply signal generation technique and simulation technique for computer capable of accurately expressing, especially, the complicated characteristic of a switching element with extremely simple concept.

CONSTITUTION: This circuit is the simulation circuit for computer consisting of an NMOS transistor, a PNP transistor and a tail current generation circuit and in which the tail current generation circuit is constituted of a current detection circuit, a change in lapse of time detection circuit, a time width control circuit and an amplifier circuit, and the collector current IC of the PNP transistor 92 is divided into the drain current ID of the NMOS transistor 91 and the tail current itail of the tail current generation circuit 31, and the tail current itail can be generated setting the time of change in the lapse of time of the drain current IDF as reference, and respective current characteristic is expressed individually, and the drain current ID is coupled with the tail current itail again, then, the collector current IC can be restored.


Inventors:
KAMESHIMA SHIGEHIRO
MIYAMORI MITSURU
Application Number:
JP27093694A
Publication Date:
May 31, 1996
Filing Date:
November 04, 1994
Export Citation:
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Assignee:
HITACHI MICROCOMPUTER SYST
International Classes:
G06G7/28; G06F17/50; (IPC1-7): G06G7/28; G06F17/50
Attorney, Agent or Firm:
Yamato Tsutsui