To supply the target clock signals of high frequency accuracy even at the time of power saving mode.

This device 100 is the device for generating first target clock signals 120 by external clock signals 110 and external divisor signals 112 provided from the outside and is provided with a clock generator 102 for generating internal clock signals 116, a first clock divider 104 for frequency-dividing the external clock signals with the external divisor signal as a divisor and obtaining second target clock signals 114, a counter 106 for counting the internal clock signals in one cycle of the second target clock signals and generating internal divisor signals and a second clock divider 108 for frequency-dividing the internal clock signals with the internal divisor signals as the divisor and generating the first target clock signals.