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Title:
METHOD OF DRIVING SWITCHING REGULATOR
Document Type and Number:
Japanese Patent JP3677505
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To make output ripple voltage or peak voltage not become large even if the range of input voltage is widened, and contrive a switching legulator to be small in size by making the switching frequency higher.
SOLUTION: A comparator 13 compares reference voltage Vr with voltage kVO obtained by the division of DC output voltage VO, and outputs an enable signal EN at the time of kVO<Vr, and outputs a disenable signal DIS at the time of kVO≥Vr. A PWM (pulth width modulation) circuit 14 operates a constant current circuit by the signal EN, and generates lamp waves. It compares the amplitude of this lamp wave with constant voltage Vc, and when the amplitude of the lamp waves reaches the constant voltage Vc, it resets the R-S flip flop set by the rise of a clock signal. Moreover, when the amplitude of a lamp wave does not reach, within the pulse width of a clock signal, the constant voltage Vc, this flip flop is set at the fall of the clock signal. Then, a switching signal SW where the pulse width is modulated by input voltage Vin is outputted from the set output terminal of this flip flop so as to switch the transistor 126 of a DC-DC converter 12.


Inventors:
Nakamura Zenzo
Application Number:
JP2003166943A
Publication Date:
August 03, 2005
Filing Date:
June 11, 2003
Export Citation:
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Assignee:
Tokyo Coil Engineering Co., Ltd.
International Classes:
H02M3/28; H02M7/48; (IPC1-7): H02M3/28; H02M7/48
Domestic Patent References:
JP2001037215A
JP2002315313A
JP2002369544A
Attorney, Agent or Firm:
Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Takashi Mine
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto