PURPOSE: To recognize the same correct data as a sender by providing a code generating circuit to convert a data signal to a pulse train and verifying the kind of substituted data.

CONSTITUTION: Parallel data is fetched from the external and held in a data register 1. Content of the register 1 is sent to a 0]/1] deciding circuit 6 in accordance with the timing of a timing circuit 2. The circuit 6 starts a 0] code generating circuit 7 or a 1] code generating circuit 8 according as one inputted data is '0' or '1'. Circuits 7 and 8 convert data to pulse trains, which consist of three or more pulses having the same width, different in width and send them to a gate driver 10. The pulse width of the output of the driver 0 is detected and counted by a '0' or '1' code checking circuit, and the data signal is recognized as '0' or '1' when the corresponding counted value exceeds a prescribed value. Thus, since pulses having the normal width are always checked, the kind of the pulse train is detected to recognize the same correct data as the sender.