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Patent Searching and Data


Title:
METHOD FOR GRINDING SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JP2010027685
Kind Code:
A
Abstract:

To provide a method for grinding a semiconductor wafer, which is applicable to a wafer irrespective of its size and circuit design, contributes to cost reduction.

This method for grinding a semiconductor wafer includes: superimposing a circuit surface of the semiconductor wafer having a circuit surface including bumps formed thereon, and a surface protecting sheet via a liquid adhesive on an outer circumferential end portion of the semiconductor wafer; hardening the liquid adhesive to bond the semiconductor wafer to the surface protecting sheet; placing the surface protecting sheet side on a fixed pedestal while protecting a bump forming portion of the semiconductor wafer; and grinding the rear surface of the semiconductor wafer.


Inventors:
KUBOTA ARATA
OKUCHI SHIGETO
Application Number:
JP2008184067A
Publication Date:
February 04, 2010
Filing Date:
July 15, 2008
Export Citation:
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Assignee:
LINTEC CORP
International Classes:
H01L21/304; B24B7/22
Attorney, Agent or Firm:
Hitoshi Maeda
Toru Suzuki