To provide a ferroelectric random access memory device which is improved in reliability and can obtain a high sensing margin when performing write operation.
The ferroelectric random access memory device comprises: word lines; cell electrode lines corresponding to each word line; bit lines arranged so as to cross the word lines; an memory cell array each of which includes a switching transistor and a ferroelectric capacitor; a row decoder circuit which generates a selection signal for selecting one of the word lines of the array and non-selection signal to be supplied to the unselected word lines, and which drives one of the cell electrode lines corresponding to the selected word line with the driving signal; and a driving signal generating circuit which generates a first level driving signal during write operation, and generates a second level driving signal higher than the first level during read operation.
COPYRIGHT: (C)2007,JPO&INPIT
JUNG DONG-JIN
KIM KI-NAM
| JPH087576A | 1996-01-12 | |||
| JPH0945089A | 1997-02-14 | |||
| JPH08115596A | 1996-05-07 | |||
| JPH05242684A | 1993-09-21 | |||
| JP3986686B2 | 2007-10-03 |
Takashi Watanabe
Yasuhiko Murayama
Shinya Mitsuhiro
Next Patent: INFORMATION RECORDING SYSTEM AND INFORMATION RECORDING METHOD