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Title:
METHOD OF MANUFACTURING FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2001267561
Kind Code:
A
Abstract:

To provide the manufacturing method of a semiconductor device, where damages to the substrate layer of an electrode can be prevented and the number of processes can be reduced, and to provide a semiconductor device.

A first insulating film 6, having a trench pattern 6a provided with a sidewall 4, is formed on a substrate 1. A metallic material layer 8, which has a recessed part along the inner wall of the trench pattern 6a, is formed. After the inside of the recessed part of the metal material layer 8 is filled with a second insulating film 9, a first insulating film 6 is exposed through planarization. The upper part of the metal material layer 8 in a trench pattern 6a is eliminated, the metallic material layer 8 is dug, and a gate electrode 8a constituted of the metal material layer 8, whose section has a recessed shape is formed in a bottom part of the trench pattern 6a. After a stopper layer 10 is embedded in the trench pattern 6a in the upper part of the gate electrode 8a, the first insulating film 6 and the second insulating film 9 are removed by etching, using the stopper layer 10 and the sidewall 4 as stoppers, and connection holes 12a, 12b which reach the substrate 1 and the gate electrode 8a, respectively, are formed.


Inventors:
ONO KEIICHI
Application Number:
JP2000077375A
Publication Date:
September 28, 2001
Filing Date:
March 21, 2000
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L29/43; H01L21/3205; H01L21/336; H01L21/8242; H01L27/108; H01L29/423; H01L29/49; H01L29/78; (IPC1-7): H01L29/78; H01L21/3205; H01L27/108; H01L21/8242; H01L29/43; H01L21/336
Attorney, Agent or Firm:
Kuninori Funabashi