To provide a method for manufacturing a semiconductor device capable of reducing NOP fail by disturbance caused by stress left inside a channel junction by performing an ion implantation process applying Zero Tilt conditions to form a P well, thereby minimizing stress caused by collision of dopants and silicon lattices and minimizing stress left inside a semiconductor substrate.

The method for manufacturing a semiconductor device includes a step that forms a Triple N well in the semiconductor substrate, a step that forms the P well inside a Triple N well region by performing the ion implantation process applying the Zero Tilt conditions, a step that forms a device isolation mask on the semiconductor substrate, a step that forms trenches in the P well region by etching the device isolation mask of a device isolation region and the semiconductor substrate, and a step that forms a device isolation film that fills trenches.