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Patent Searching and Data


Title:
METHOD FOR POLISHING SEMI-CONDUCTOR WAFER
Document Type and Number:
Japanese Patent JPH09262761
Kind Code:
A
Abstract:

To provide a method for polishing a semi-conductor wafer in which the single side mirror wafer with excellent accuracy can be efficiently processed without occurrence inconveniences such as roughness and flaws of an end face of the wafer incurred by a carrier by making use of the motion of the simultaneous double side mirror polishing.

A single side mirror wafer can be easily obtained by setting a thin disk plate 7 in which wafers 8, 8 are adhered to each side to a hole 5 in a carrier 4, and polishing the plate, and the contact of the carrier hole 5 with the wafer 8 can be avoided by setting the diameter of the plate to be larger than that of the wafer 8, and the single side mirror wafer with excellent accuracy can be efficiently machined.


Inventors:
MATSUO HIROSHI
Application Number:
JP9899596A
Publication Date:
October 07, 1997
Filing Date:
March 27, 1996
Export Citation:
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Assignee:
SUMITOMO SITIX CORP
International Classes:
B24B37/27; B24B37/28; H01L21/304; (IPC1-7): B24B37/04; H01L21/304
Attorney, Agent or Firm:
Yoshihisa Oshida