To provide a technology of attaining high speed processing for data received through the FCMC in a DSRC (dedicated short range communication) so as to save the power consumption of a processing apparatus at low cost.
A flowchart indicating FCMC reception data processing includes: a step S101 of receiving FCMC data; a step S102 of storing received data in a reception buffer; a step S103 of discriminating the end of reception of an FSI (frame structure information) field; a step S104 of transferring FSI data from the reception buffer to a CPU; a step S105 of applying advance read analysis 1 to the FSI data; a step S106 of discriminating the end of reception of a CI (control information) sub-field; a step S107 of transferring CI data from the reception buffer to the CPU; a step S108 of applying advance read analysis processing to the CI data; and a step S109 of applying CRC discrimination to the received data. Acquiring slot information after the FCMS before the end of reception of the FCMC can prepare a succeeding slot of an FCMS.
Hironori Honda
Toshimitsu Ichikawa
Takeshi Takamatsu
Yuriko Hamada