PURPOSE: To pull-in frame synchronization in a short time by continuing the accumulation which judges the acquisition of frame synchronization even after the occurrence of cycle slip without canceling the accumulation due to the occurrence of the cycle slip.

CONSTITUTION: An adder circuit 14 obtains a 1st accumulating value, in which an initial value is started from 0, 1 is incremented when a unique word is detected at the prescribed location of a frame and 1 is decremented when the unique word is not detected at the prescribed location of the frame. Then the absolute value of the 1st accumulating value is limited at a 1st prescribed value decided by a delay stage number of a delay circuit 12, an adder circuit 17 obtains a 2nd accumulating value by accumulating the absolute value of the 1st accumulating value and when the 2nd accumulating values are 2nd prescribed values or above, it is judged that frame synchronization is pulled-in. Thus, in the case of the occurrence of a cycle slip, frame synchronization is pulled-in a shorter time than that of a conventional synchronization pulling-in method.