METHOD FOR TESTING SEMICONDUCTOR DEVICE

Japanese Patent JP3724927

B2

PROBLEM TO BE SOLVED: To execute test in a relatively short time by increasing the number of chips to be simultaneously measured by a probe card for test, without newly providing a pad exclusively for test on a wafer in a testing method for testing each semiconductor element in the state of a wafer including plural semiconductor elements constituting a semiconductor device.
SOLUTION: An insulating film is formed on a wafer including plural semiconductor elements, and a metallic film brought into contact with a first electrode extracted from the plural semiconductor elements is formed through the hole of the insulating film, and a virtual wiring layer suited for etching the metallic film, and operating wafer test is formed, and a second electrode is extracted from the virtual wiring layer and arranged at an arbitrary position on the wafer. Next, a test probe for conducting wafer test is brought into contact with the second electrode so that each semiconductor element in the wafer can be tested, and after the test has been completed, the virtual wiring layer and the second electrode are removed.

Yasuo Matsuzaki
Masao Nakano
Yasuhiro Fujii
Shinnosuke Kamata
Makoto Yanagisawa
Toyo Yamada
Masami Matsuoka
Hiroyuki Tomita

JP19610097A

December 07, 2005

July 22, 1997

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富士通株式会社

H01L21/66; (IPC1-7): H01L21/66

JP6314743A
JP8031889A
JP62062552A

Takashi Ishida
Shigeru Tsuchiya
Toshio Toda
Masaya Nishiyama

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