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Patent Searching and Data


Title:
METHOD OF TREATING SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JPH10223619
Kind Code:
A
Abstract:

To provide a method of treating semiconductor wafer which reliably removes particles from a treating chamber and substrate surface in a treating cycle, without adding a long time.

A treating chamber 210 has an isolation region 252. An electrically controlled grid 250 is inserted between the region 252 and liner 220 and has independently voltage-controllable segments 250a, 250b, 250c, 250d. Power is fed between treating steps of a semiconductor substrate 230 to attract particles 235 floating in the chamber 210 toward the grid 250 away from the substrate. While a gas flow or pressure lowering is made in the treating chamber the voltage on the grid is changed to move the particles 235 to a pumping port 239 owing an electric force and remove the particles through this port from the chamber.


Inventors:
KARL EMERSON MOTZ
Application Number:
JP3377298A
Publication Date:
August 21, 1998
Filing Date:
January 30, 1998
Export Citation:
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Assignee:
MOTOROLA INC
International Classes:
H01L21/302; C23C16/44; C23C16/50; H01L21/3065; H01L21/311; H01L21/3213; H01L21/683; (IPC1-7): H01L21/3065; H01L21/68
Attorney, Agent or Firm:
Yoshiaki Ikeuchi