Title:
DELTA/SIGMA MODULATOR FOR A/D CONVERTER HAVING LOW NOISE CHARACTERISTIC
Document Type and Number:
Japanese Patent JP2960279
Kind Code:
B2
Abstract:
PURPOSE: To provide a method for reducing thermal noise of a delta sigma modulator.
CONSTITUTION: An A/D converter has a 2-bit delta sigma modulator. The delta sigma modulator has a 1st integration stage 10 that gives a signal to a noise generating circuit 18. An output of the noise generating circuit 18 is given to an A/D converter having two threshold levels, from which a 2-bit output is obtained. The output of the A/D converter is given to a digital filter 22, from which a filtered digital output with high frequency noise filtered is obtained. The output of the A/D converter is fed back to a summing point at the input of the integration device 10 via a 3-level D/A converter. The 3-level D/A converter has three states, on which is an idle state. The thermal noise characteristic of the delta sigma modulator is at first simulated as a function of a threshold voltage of a quantizer and the threshold voltage of the quantizer is selected so as to obtain an optimum signal versus noise characteristic.
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Inventors:
CHAARUSU DEII TONPUSON
Application Number:
JP10753093A
Publication Date:
October 06, 1999
Filing Date:
April 09, 1993
Export Citation:
Assignee:
KURISUTARU SEMIKONDAKUTAA CORP
International Classes:
H03M1/08; H03M3/00; H03M3/02; (IPC1-7): H03M3/02; H03M1/08
Domestic Patent References:
| JP3117034A | ||||
| JP5110442A |
Attorney, Agent or Firm:
Koichiro Kato (2 outside)