To decrease the size of a conversion table and to make the circuit scale small, while keeping minimum run and the conversion rate unchanged by converting an (m)-bit data sequence into an (n)-bit variable-length code in accordance with a conversion table.

With a minimum run d=4 and a conversion rate m/n=2/5, an (m)-bit data sequence is converted into an (n)-bit variable-length code. The data sequence has data sectioned by 2 bits through a shift register 11 and is supplied to a restriction length decision part 12, a substitute code detection part 13 which keeps a minimum run, a substitute code detection part 14 which keeps a maximum run, and conversion parts 15-1 to 15-4. The conversion parts 15-1 to 15-4 refer to specific conversion tables, and convert supplied data, when a conversion rule corresponding to the data is registered and then outputs the converted code to a multiplexer 16. The conversion tables have substitute codes which for keeping the minimum run, substitute codes for preserving the maximum run, and other basic codes.