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Title:
MULTI-LAYER PROTOCOL PROCESSOR FOR COMMON USE OF MEMORY
Document Type and Number:
Japanese Patent JPH07143133
Kind Code:
A
Abstract:

PURPOSE: To reduce a required memory quantity by using a memory for storing line input output data in common for layers and transferring the data indirectly through the use of addresses stored in the common use memory.

CONSTITUTION: Each processing among layers 1-3 is implemented respectively by a layer 1 protocol processing section 101, a layer 2 protocol processing section 102, and a layer 3 protocol processing section 103. Each of the protocol processing sections 101-103 is connected to a common use memory 105 through a system bus 104 and to a bus contention arbitration control section 106 controlling the use of the common use memory 105. That is, each of the protocol processing sections 101-103 and the common use memory 105 are connected through the bus to be accessible to each other, and the bus contention arbitration control section 106 is connected to each processing section so as to avoid the collision when the bus is in use. Then input output line data themselves are not directly transferred among the layers 1-3 but transferred indirectly based on addresses stored in the common use memory 105.


Inventors:
KAGAWA MANABU
Application Number:
JP14797593A
Publication Date:
June 02, 1995
Filing Date:
June 18, 1993
Export Citation:
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Assignee:
NEC CORP
International Classes:
H04L29/08; H04L12/28; (IPC1-7): H04L12/28; H04L29/08
Domestic Patent References:
JPH03294949A1991-12-26
JPH01136263A1989-05-29
JPS63121342A1988-05-25
Attorney, Agent or Firm:
Wakabayashi Tadashi



 
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