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Title:
MULTILAYER LEAD FRAME
Document Type and Number:
Japanese Patent JPH04107961
Kind Code:
A
Abstract:

PURPOSE: To narrow the intervals between leads while being thinly made by a method wherein in a multilayer lead frame, a semiconductor insertion opening is provided in the upper surface central part of an island part of a lead frame consisting of the is land part and an outer lead part, besides an insulating sheet having a wiring part is connected on the surface thereof.

CONSTITUTION: Three sheets of insulating sheets 6, 6', 6" having the opening parts 4, 4', 4" for semiconductor insertion on the central part thereof while having wirings 5, 5', 5" on one side thereof are connected on a large-sized island part 3 combining a heat sink of a semiconductor 2 of a lead frame 1 by means of an epoxy group resin adhesive 7, and the semiconductor 2 is connected to the island part 3 of an opening part for semiconductor insertion by using conductive paste 8. In the insulating sheets to be used therefor, the wirings are formed by etching, and the thickness of the insulating sheets to be used including the thickness of the wiring part is about 0.055mm.


Inventors:
OIGAWA KINYA
Application Number:
JP22526190A
Publication Date:
April 09, 1992
Filing Date:
August 29, 1990
Export Citation:
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Assignee:
SUMITOMO METAL MINING CO
International Classes:
H01L23/50; (IPC1-7): H01L23/50
Domestic Patent References:
JPS622628A1987-01-08
JP1107155B
JPH0277145A1990-03-16
Attorney, Agent or Firm:
Yoshihisa Oshida



 
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