Title:
MULTISTAGE STRUCTURING DEVICE FOR LOGIC CIRCUIT
Document Type and Number:
Japanese Patent JPH06162134
Kind Code:
A
Abstract:
PURPOSE: To constitute a multistage logic circuit which is shown by a truth table by efficiently extracting factors and minimizing the scale of the logic circuit.
CONSTITUTION: A rectangle extracted from the contents of a candidate factor storage device 12 by using a rectangle extracting device 13 is compared with a rectangle extracted by using a logical structure converting device 14 and the logic circuit is formed into multistage structure by using the comparison result. Further, the logical structure converting device 14 converts the logical structure of candidate factors stored in a candidate factor storage device 12.
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Inventors:
NAKAMURA YUICHI
Application Number:
JP33563892A
Publication Date:
June 10, 1994
Filing Date:
November 20, 1992
Export Citation:
Assignee:
NEC CORP
International Classes:
G06F17/50; (IPC1-7): G06F15/60
Attorney, Agent or Firm:
Shinsuke Honjo
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