PURPOSE: To lessen the area of field oxide in an element isolation region of a semiconductor device in which the field oxide is formed in a boundary part between PMOS and NMOS and thereby to enable reduction of an element.

CONSTITUTION: Impurities having the same conductivity type as each of a P well diffusion layer 2 and an N well diffusion layer 3 disposed adjacently in a semiconductor substrate 1 are ion-implanted in the whole of each diffusion layer with a sufficient energy for passing through a field oxide 4, and thereby the diffusion layers are made to have impurity diffusion layers 6 and 7 of high concentration directly under the field oxide 1 at least, respectively. By this method, the impurity concentration under the field oxide is increased without affecting a channel part of an element, a threshold voltage of parasitic MOS is increased and reduction of an element isolation region is enabled.