Title:
NOISE REMOVAL CIRCUIT
Document Type and Number:
Japanese Patent JP3540528
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a noise removal circuit which can sufficiently remove noise included in an input signal.
SOLUTION: A prescribed frequency component contained in a luminance signal is extracted in BPF 12a-12n and it is amplified in limitter amplifiers 16a-16n. An addition signal containing an amplified and suppressed luminance signal component and an amplified noise component is obtained from an adder 20a. The luminance signal is level-adjusted in an amplifier 18 through HPF 14. The noise component is obtained from a subtracter 20b by subtracting an amplifier signal from the addition signal in the subtracter 20b. Then, the luminance signal from which noise is removed is outputted from an output terminal S2 by subtracting the luminance signal from a delay circuit 22a with the noise component by a subtracter 20c. Since the luminance signal is separated into plural bands by plural BPF, the noise component is not saturated by a limitter and noise can sufficiently be removed.
Inventors:
Nobukazu Hosoya
Application Number:
JP33049696A
Publication Date:
July 07, 2004
Filing Date:
December 11, 1996
Export Citation:
Assignee:
Sanyo Electric Co., Ltd.
International Classes:
G11B20/02; H03G11/00; H03H1/00; H03H11/04; H04N5/21; H04N5/93; (IPC1-7): H04N5/93; G11B20/02; H03G11/00; H04N5/21
Domestic Patent References:
| JP3284067A | ||||
| JP4274686A | ||||
| JP5056309A | ||||
| JP9046555A |
Attorney, Agent or Firm:
Yoshito Yamada
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