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Title:
NONVOLATILE MEMORY CIRCUIT
Document Type and Number:
Japanese Patent JPS5538664
Kind Code:
A
Abstract:

PURPOSE: To make it possible to write and read information at a high speed without limiting the number of rewriting operation by making nonvolatile the operation results of the dynamic memory of a MIS semiconductor nonvolatile memory transistor.

CONSTITUTION: Binary information according to the ON-OFF operation of transistor Q2 corresponding to the charge in the floating capacity of control gate 17 of MIS transistor Q2 is read out through transistor Q3 to turn OFF transistor Q1 connected to gate 17. As a result, the write or refreshing operation of transistor Q2 is performed and transistor Q2 operates as a dynamic memory at a high speed. On the other hand, when transistor Q3 is turned ON by applying read digit line 12 with a voltage pulse of more than its critical voltage, gate 17 is charged; when the memory contents is "1", the threshold voltage of transistor Q2 never changes because a write voltage applied to drain 18 through transistor Q3 is high, and when "0", it does not change neither. As a result, information is stored in transistor Q2 even at power-OFF time and transistor Q2 operates as a nonvolatile memory, so that high-speed write and read operations can be performed without limiting the number of write operation.


Inventors:
HAMADA MINORU
Application Number:
JP11117078A
Publication Date:
March 18, 1980
Filing Date:
September 08, 1978
Export Citation:
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Assignee:
SANYO ELECTRIC CO
International Classes:
G11C11/405; G11C14/00; G11C16/04; G11C17/00; (IPC1-7): G11C11/40; G11C17/00
Domestic Patent References:
JPS5152248A1976-05-08



 
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