PURPOSE: To uniformize the electric characteristic such as the transfer characteristic of each channel, input/output resistance and power supply resistance by arranging same component part of plural logic circuits alternately so as to absorb the in-plane dispersion caused by the manufacture process.

CONSTITUTION: Since parts of 1st and 2nd output buffer circuits in common to each other comprising transistors(TRs) P11/N11, P2n/N2n, P12/N12... are arranged side by side on a silicon substrate, the inplane characteristic distribution received in each manufacture gives almost the same effect onto the electric characteristic of the 1st and 2nd output buffer circuits. Thus, the dispersion in the electric characteristic between both the circuits is absorbed and the electric characteristic is made almost the same for both the circuits. Even when the 1st and 2nd output buffer circuits are entirely processed by exposure twice or over, since elements of both the circuits receiving a beam by one exposure includes almost the same number of CMOS inverter circuits, it is possible to arrange the electric characteristic of both the circuits. Furthermore, both the circuits are structured almost symmetrically and immune to external noise or noise of power supply.