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Patent Searching and Data


Title:
OUTPUT CONTROL CIRCUIT OF INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS5962934
Kind Code:
A
Abstract:

PURPOSE: To make a drive signal of an external device to a constant frequency at all times by frequency-dividing a system clock corresponding to frequency and selecting only the frequency dividing output of a specific frequency in the frequency dividing output based on the clock switching signal to output the selected output to the external device.

CONSTITUTION: A clock signal is outputted from an oscillator 10, a clock SC-b frequency-divided into 1/2 at a D type FF20 and a clock SC-a from an inverter 14 are selected at a selecting circuit 40 with a clock switching signal SL, and a system clock SC is inputted to a frequency division circuit 60. Further, 1/27 and 1/28 frequency dividing outputs from the circuit 60 are inputted respectively to a selecting circuit 70. A clock switching signal SL in response to the processing state of system from an operation control circuit 30 is applied to the circuit 70, and any frequency dividing output is selected based on the switching signal SL, and applied to an AND gate 81 inputting the output of a buzzer signal output control circuit 80 to make the frequency of a buzzer drive signal BZ constant.


Inventors:
IWAKI MASAHIRO
NOMURA HIROSHI
YAHIRO HIROSHI
KOBAYASHI JIYUNJI
MIMURA HIDENORI
SHIMIZU YASUO
Application Number:
JP17305382A
Publication Date:
April 10, 1984
Filing Date:
September 30, 1982
Export Citation:
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Assignee:
TOSHIBA KK
International Classes:
G06F1/08; G06F1/04; (IPC1-7): G06F1/04
Attorney, Agent or Firm:
Takahisa Kimura