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Patent Searching and Data


Title:
PACKET SWITCHING SYSTEM
Document Type and Number:
Japanese Patent JPH06216941
Kind Code:
A
Abstract:

PURPOSE: To eliminate a need of contention control and to improve the efficiency furthermore by increasing the internal operation speed of a self-routing multistage switch n times and providing buffers on the output side also and always routing one packet in a routing network.

CONSTITUTION: After packets from input ports 100 to 103 are temporarily stored in input buffers 110 to 113, they are inputted to a routing network 121 when timing signals T1 to T4 of a timing generator 150 are in the high level. The network 121 is a banyan network consisting of unit switches 4 with output selecting function and constitutes a self-routing multistage switch 120, and input packets are routed and outputted at n-fold arrival speed (n=4 in this example) Output packets are stored in output buffers 130 to 133 and are sent to output ports at the same speed as input to input ports. Thus, contention control is unnecessary, and the efficiency is improved furthermore.


Inventors:
KAJIMA SHIGETAKA
HAYASHI KENTARO
Application Number:
JP517993A
Publication Date:
August 05, 1994
Filing Date:
January 14, 1993
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H04L45/60; (IPC1-7): H04L12/56
Attorney, Agent or Firm:
Toshiaki Suzuki