Title:
LEVEL CONVERTING CIRCUIT
Document Type and Number:
Japanese Patent JP3217224
Kind Code:
B2
Abstract:
PURPOSE: To provide the level converting circuit which is inserted between circuits to be operated by different power supply voltages for changing the output level of the preceding step circuit to the operation level of the following step circuit so as to decrease unwanted pulses when turning on a power source.
CONSTITUTION: This circuit is composed of a level shift circuit 100 and a buffer circuit 200 to which the output of this circuit 100 is inputted, and the buffer circuit 200 is provided with an inverter which inputs the output of the preceding step circuit and an enable signal and inputs the output of a NAND gate. When the logic of enable signal is set at an L level, the output of the inverter is fixed at the L level.
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Inventors:
Yutaka Takahashi
Manabu Niiyama
Yoshiki Goto
Manabu Niiyama
Yoshiki Goto
Application Number:
JP3321895A
Publication Date:
October 09, 2001
Filing Date:
February 22, 1995
Export Citation:
Assignee:
富士通株式会社
International Classes:
H03K19/003; H03K19/0175; H03K19/0185; (IPC1-7): H03K19/0175
Attorney, Agent or Firm:
Tsunenori Hayashi