PURPOSE: To simplify the correction of a control program by providing the information in response to data to decide whether a parity check should be carried out when the data is delivered.
CONSTITUTION: ROMs R1 and R2 can store N words with one word defined as 8 bits respectively, and the control data are produced for each word. The ROMR2 contains parity bits B1WBN equivalent to a bit and enable bits E1WEN in response to each word. The control data stored in the ROMR1 is sent to a procesfor M as well as to a parity checker P. The parity information on bits B1WBN which are read out of the ROMR2 are sent to the checker P. While the enable information given from bits E1WEN are applied to an AND circuit A via an inverter I. The output of the checker P is supplied to the processor M via the circuit A.
JPS5360126A | 1978-05-30 | |||
JPS5317037A | 1978-02-16 |