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Title:
PHASE LOCKED VOLTAGE CONTROLLED OSCILLATOR
Document Type and Number:
Japanese Patent JPS62145923
Kind Code:
A
Abstract:

PURPOSE: To always keep the phase of an input/output signal to a prescribed relation by using an output of a phase coincidence detection circuit so as to change the load of a frequency division counter of a frequency divider.

CONSTITUTION: The frequency divider 5 generates a frequency being a common measure to an input signal frequency Fin and an output signal frequency Fout. The phase of a frequency being a common measure to a frequency from a frequency divider 6 obtained from an input signal and the phase of a frequency being a common measure to a frequency of the frequency divider 5 are compared by a phase coincidence detection circuit 9. An output signal of the phase coincidence detection circuit 9 changes a load value of the frequency division counter of the frequency divider 5 to approach the phase of the output signal to the phase to be stabilized and the phase of an input/output signal is matched accurately by a phase discrimination circuit 7.


Inventors:
KATO TAKEO
OKINO TAKAYUKI
MORIMOTO AKIO
Application Number:
JP28704185A
Publication Date:
June 30, 1987
Filing Date:
December 20, 1985
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03L7/10; H03L7/06; (IPC1-7): H03L7/06
Attorney, Agent or Firm:
Sadaichi Igita



 
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