To extend the band of the oscillation frequency and to reduce the spurious in a PLL circuit in the mixer system.
A VCO(voltage controlled oscillator) 1 is controlled by the error signal, which is generated by comparing the phase of the output obtained by frequency conversion of the output of the VCO and that of a VFO(variable frequency oscillator) of a DDS circuit 5 with the phase of a phase comparison signal based on an REF OSC 12 by a mixer, to lock a PLL circuit. Phase shifters 2 and 4 are provided instead of the mixer in this circuit, and the output converted into a 90° phase difference signal is subjected to frequency conversion by a DBM (double balanced mixer) 3. A circuit is provided which synthesizes outputs of the DBM to output a sum component or a difference component.
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