To prevent lock-in from being generated near the upper or lower limit value of the control frequency band, by selecting any coefficient so as to newly locate a clock output at the central part of multiplication control frequency band when out-of-lock occurs.

Corresponding to the discriminated result of a horizontal synchronizing frequency discrimination circuit 40, an initial set value in a coefficient Q control circuit 26 is selected/set. Only when the phase deviation between a reference signal (horizontal synchronizing signal) H.REF and a compare signal H.VARI continues for a fixed period, an out-of-lock detection circuit 25 changes a coefficient set signal 29 of a coefficient Q control circuit 26 by turning an out-of-lock detecting pulse 27 to be at H level. Then, when setting the new coefficient of a coefficient multiplier in the case of out-of-lock occurrence, a coefficient controllable by a clock frequency fout near the center of control range is selected out of plural lock-in controllable coefficients. Namely, when out-of-lock occurs, a coefficient to be locked near the center of VCO control voltage range is selected and set out of plural lock-in enabled coefficients.