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Title:
PRINTED WIRING BOARD AND ITS MANUFACTURING METHOD AS WELL AS SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3711343
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To provide a printed wiring board incorporating a thin-type large-capacitance capacitor.
SOLUTION: The printed wiring board comprises a metal plate 11 whose surface is partially or totally roughened and which has irregularities, a dielectric film 12 for capacitors for covering the surface of the metal plate, and a first conductive layer 13 made of a conductive resin for covering the dielectric film surface for capacitors. A second conductive layer 14 is arranged on the surface of the first conductive layer at the region of a via 18 for connecting a cathode. The printed wiring board has resin 15 for covering the metal plate and the first and second conductive layers. The via 18 for connecting the cathode side comprises an electrode 20 where the resin 15 is deposited to a via that is punched to the second conductive layer 14. A via 19 for connecting an anode side comprises an electrode 21 where the resin 15 is deposited to a via that is punched to the surface of the metal plate. The electrode 21 and the second conductive layer 13 are insulated by the resin 15.


Inventors:
Hirofumi Nakamura
Arai Tomoji
Application Number:
JP2002185819A
Publication Date:
November 02, 2005
Filing Date:
June 26, 2002
Export Citation:
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Assignee:
Toppan nec Circuit Solutions Co., Ltd.
NEC TOKIN CORPORATION
International Classes:
H01G9/00; H01G9/012; H01G9/028; H01G9/04; H01L21/60; H01L23/12; H01L23/498; H01L23/64; H05K1/16; H05K3/46; H01L21/56; H05K3/38; (IPC1-7): H05K1/16; H01G9/00; H01G9/012; H01G9/028; H01G9/04; H01L23/12; H05K3/46
Domestic Patent References:
JP2001257132A
JP1292808A
JP6279610A
Attorney, Agent or Firm:
Kato Asamichi